1. Field of the Invention
The present invention relates to a semiconductor memory device and control method, for example, to a read operation of a magneto-resistive random access memory (MRAM).
2. Description of the Related Art
The MRAM is a device which uses a magneto-resistive effect to store “1” or “0” information and to perform a memory operation. Moreover, the device has a nonvolatile property, high integration property, and high reliability, also performs a high-speed operation, and is expected as a memory device which can replace to a related-art dynamic random access memory (DRAM) and electrically erasable and programmable read only memory (EEPROM).
In the MRAM, a magneto tunneling junction (MTJ) element using a variation of a magneto-resistance by a spin polarized tunnel effect is used in a memory cell. The memory cell is proposed, for example, in “IEEE International Solid-State Circuits Conference 2000 Digest Paper”, TA7.2, “IEEE International Solid-State Circuits Conference 2000 Digest Paper”, TA7.3 (FIG. 4), and the like. For these memory cells, for example, one MTJ element and MOS transistor are connected in series. The MOS transistor is used for selecting the memory cell. Furthermore, in Jpn. Pat. Appln. KOKAI Publication No. 2003-242771 (FIG. 6), a cross point type memory cell is disclosed.
The MTJ element is formed by a laminate film in which mainly an insulating film is held between two metal magnetic materials. Moreover, directions of spins of two magnetic materials are set to be parallel or anti-parallel to each other to allow two states. That is, a magnitude of a current tunneling and flowing through the insulating film in a case in which magnetization directions of two magnetic films are the same is larger than that in a case in which the magnetization directions of two magnetic films are opposite to each other. Furthermore, in other words, when the magnetization directions of two magnetic films are set to be opposite to each other, a resistance value between the magnetic films can be increased as compared with the case in which the magnetization directions of two magnetic films are the same. Therefore, when the difference of the resistance value of the MTJ element is large, the data is preferably read.
To read the data from the memory cell, the current flowing between the magnetic films via the insulating film is detected, or the current value is converted to a voltage and detected.
Next, a write operation of MRAM will be described. At a write operation, usually the magnetization direction of either one of two magnetic films is fixed and is prevented from being influenced by an external magnetic field. Here, the magnetic field whose magnetization direction is fixed is referred to as a pinning layer. The magnetization direction of the other magnetic field is set to be the same as or opposite to that of the pinning layer in accordance with an applied magnetic field. Here, the magnetic field whose magnetization direction is controlled is referred to as a free layer. The magnetization direction of the free layer is controlled by the direction of the magnetic field generated by the current flowing through a bit line and write word line passed through the memory cell. At this time, a half amount of a current amount necessary for changing the magnetization is respectively supplied to the bit line and word line. This prevents a non-selected memory cell from being wrongly rewritten. This technique is disclosed, for example, in U.S. Pat. No. 6,081,445.
Additionally, at the read operation of the data, a small voltage of about several hundreds of millivolts is applied to the memory cell. By this applied voltage, the current flowing through the memory cell is detected. At this time, a reference signal to be compared with the detected current value is necessary.
To obtain the signal for the reference, there is a method comprising: writing signals complementary to each other in two memory cells so that one bit includes two memory cells. According to the present method, at the read operation, the current amounts from two memory cells are compared with each other to judge the data.
Moreover, there is a method of adjusting a gate voltage of a MOS transistor connected in series to the MTJ element to set the resistance value between high and low resistance values of the memory cell. This technique is disclosed, for example, in U.S. Pat. No. 6,055,178.
As described above, in the related-art MRAM, the reference signal to be compared with the read data is required at the read operation of the data. Moreover, various methods for generating the reference signal have been proposed. However, in the method of writing the signals complementary to each other in two memory cells, only one bit data can be held by two memory cells. Therefore, the method is sometimes unsuitable for a memory cell array which has a large capacity since the method doesn't shows good scalability.
Moreover, in a method of adjusting a gate voltage of the MOS transistor in the memory cell, the resistance value of the memory cell to generate the reference signal largely depends on characteristics of the MOS transistor. Therefore, there has been a tendency that the reliability of the reference signal has uncertainty.